51 #include "avrmalloc.h" 73 struct opcode_info *global_opcode_lookup_table;
121 static int avr_op_CALL (AvrCore *core, uint16_t opcode,
unsigned int arg1,
123 static int avr_op_JMP (AvrCore *core, uint16_t opcode,
unsigned int arg1,
125 static int avr_op_LDS (AvrCore *core, uint16_t opcode,
unsigned int arg1,
127 static int avr_op_STS (AvrCore *core, uint16_t opcode,
unsigned int arg1,
137 get_rd_2 (uint16_t opcode)
139 int reg = ((opcode &
mask_Rd_2) >> 4) & 0x3;
140 return (reg * 2) + 24;
144 get_rd_3 (uint16_t opcode)
147 return ((reg >> 4) & 0x7) + 16;
151 get_rd_4 (uint16_t opcode)
154 return ((reg >> 4) & 0xf) + 16;
158 get_rd_5 (uint16_t opcode)
161 return ((reg >> 4) & 0x1f);
165 get_rr_3 (uint16_t opcode)
171 get_rr_4 (uint16_t opcode)
177 get_rr_5 (uint16_t opcode)
180 return (reg & 0xf) + ((reg >> 5) & 0x10);
184 get_K_8 (uint16_t opcode)
187 return ((K >> 4) & 0xf0) + (K & 0xf);
191 get_K_6 (uint16_t opcode)
194 return ((K >> 2) & 0x0030) + (K & 0xf);
198 get_k_7 (uint16_t opcode)
200 return (((opcode &
mask_k_7) >> 3) & 0x7f);
204 get_k_12 (uint16_t opcode)
210 get_k_22 (uint16_t opcode)
215 return ((k >> 3) & 0x003e) + (k & 0x1);
219 get_reg_bit (uint16_t opcode)
225 get_sreg_bit (uint16_t opcode)
231 get_q (uint16_t opcode)
235 int qq = (((q >> 1) & 0x1000) + (q & 0x0c00)) >> 7;
236 return (qq & 0x0038) + (q & 0x7);
240 get_A_5 (uint16_t opcode)
246 get_A_6 (uint16_t opcode)
249 return ((A >> 5) & 0x0030) + (A & 0xf);
260 get_add_carry (uint8_t res, uint8_t rd, uint8_t rr,
int b)
262 uint8_t resb = res >> b & 0x1;
263 uint8_t rdb = rd >> b & 0x1;
264 uint8_t rrb = rr >> b & 0x1;
265 return (rdb & rrb) | (rrb & ~resb) | (~resb & rdb);
269 get_add_overflow (uint8_t res, uint8_t rd, uint8_t rr)
271 uint8_t res7 = res >> 7 & 0x1;
272 uint8_t rd7 = rd >> 7 & 0x1;
273 uint8_t rr7 = rr >> 7 & 0x1;
274 return (rd7 & rr7 & ~res7) | (~rd7 & ~rr7 & res7);
278 get_sub_carry (uint8_t res, uint8_t rd, uint8_t rr,
int b)
280 uint8_t resb = res >> b & 0x1;
281 uint8_t rdb = rd >> b & 0x1;
282 uint8_t rrb = rr >> b & 0x1;
283 return (~rdb & rrb) | (rrb & resb) | (resb & ~rdb);
287 get_sub_overflow (uint8_t res, uint8_t rd, uint8_t rr)
289 uint8_t res7 = res >> 7 & 0x1;
290 uint8_t rd7 = rd >> 7 & 0x1;
291 uint8_t rr7 = rr >> 7 & 0x1;
292 return (rd7 & ~rr7 & ~res7) | (~rd7 & rr7 & res7);
296 get_compare_carry (uint8_t res, uint8_t rd, uint8_t rr,
int b)
298 uint8_t resb = res >> b & 0x1;
299 uint8_t rdb = rd >> b & 0x1;
300 uint8_t rrb = rr >> b & 0x1;
301 return (~rdb & rrb) | (rrb & resb) | (resb & ~rdb);
305 get_compare_overflow (uint8_t res, uint8_t rd, uint8_t rr)
307 uint8_t res7 = res >> 7 & 0x1;
308 uint8_t rd7 = rd >> 7 & 0x1;
309 uint8_t rr7 = rr >> 7 & 0x1;
312 return (rd7 & ~rr7 & ~res7) | (~rd7 & rr7 & res7);
322 is_next_inst_2_words (AvrCore *core)
326 uint16_t next_opcode =
327 flash_read (core->flash, avr_core_PC_get (core) + 1);
330 return ((opi->func == avr_op_CALL) || (opi->func == avr_op_JMP)
331 || (opi->func == avr_op_LDS) || (opi->func == avr_op_STS));
335 n_bit_unsigned_to_signed (
unsigned int val,
int n)
340 if ((val & (1 << (n - 1))) == 0)
345 return -1 * ((~val & mask) + 1);
355 avr_op_ADC (AvrCore *core, uint16_t opcode,
unsigned int arg1,
367 int H, V, N, S, Z, C;
372 uint8_t rd = avr_core_gpwr_get (core, Rd);
373 uint8_t rr = avr_core_gpwr_get (core, Rr);
377 uint8_t sreg = avr_core_sreg_get (core);
379 sreg =
set_bit_in_byte (sreg, SREG_H, H = get_add_carry (res, rd, rr, 3));
380 sreg =
set_bit_in_byte (sreg, SREG_V, V = get_add_overflow (res, rd, rr));
384 sreg =
set_bit_in_byte (sreg, SREG_C, C = get_add_carry (res, rd, rr, 7));
386 avr_core_sreg_set (core, sreg);
388 avr_core_gpwr_set (core, Rd, res);
396 avr_op_ADD (AvrCore *core, uint16_t opcode,
unsigned int arg1,
408 int H, V, N, S, Z, C;
413 uint8_t rd = avr_core_gpwr_get (core, Rd);
414 uint8_t rr = avr_core_gpwr_get (core, Rr);
416 uint8_t res = rd + rr;
418 uint8_t sreg = avr_core_sreg_get (core);
420 sreg =
set_bit_in_byte (sreg, SREG_H, H = get_add_carry (res, rd, rr, 3));
421 sreg =
set_bit_in_byte (sreg, SREG_V, V = get_add_overflow (res, rd, rr));
425 sreg =
set_bit_in_byte (sreg, SREG_C, C = get_add_carry (res, rd, rr, 7));
427 avr_core_sreg_set (core, sreg);
429 avr_core_gpwr_set (core, Rd, res);
437 avr_op_ADIW (AvrCore *core, uint16_t opcode,
unsigned int arg1,
454 uint8_t rdl = avr_core_gpwr_get (core, Rd);
455 uint8_t rdh = avr_core_gpwr_get (core, Rd + 1);
457 uint16_t rd = (rdh << 8) + rdl;
458 uint16_t res = rd + K;
460 uint8_t sreg = avr_core_sreg_get (core);
463 (~(rdh >> 7 & 0x1) & (res >> 15 & 0x1)));
468 (~(res >> 15 & 0x1) & (rdh >> 7 & 0x1)));
470 avr_core_sreg_set (core, sreg);
472 avr_core_gpwr_set (core, Rd, res & 0xff);
473 avr_core_gpwr_set (core, Rd + 1, res >> 8);
482 avr_op_AND (AvrCore *core, uint16_t opcode,
unsigned int arg1,
499 uint8_t rd = avr_core_gpwr_get (core, Rd);
500 uint8_t rr = avr_core_gpwr_get (core, Rr);
501 uint8_t res = rd & rr;
503 uint8_t sreg = avr_core_sreg_get (core);
510 avr_core_sreg_set (core, sreg);
512 avr_core_gpwr_set (core, Rd, res);
520 avr_op_ANDI (AvrCore *core, uint16_t opcode,
unsigned int arg1,
537 uint8_t rd = avr_core_gpwr_get (core, Rd);
538 uint8_t res = rd & K;
540 uint8_t sreg = avr_core_sreg_get (core);
547 avr_core_sreg_set (core, sreg);
549 avr_core_gpwr_set (core, Rd, res);
557 avr_op_ASR (AvrCore *core, uint16_t opcode,
unsigned int arg1,
573 uint8_t rd = avr_core_gpwr_get (core, Rd);
574 uint8_t res = (rd >> 1) + (rd & 0x80);
576 uint8_t sreg = avr_core_sreg_get (core);
584 avr_core_sreg_set (core, sreg);
586 avr_core_gpwr_set (core, Rd, res);
594 avr_op_BCLR (AvrCore *core, uint16_t opcode,
unsigned int arg1,
614 avr_op_BLD (AvrCore *core, uint16_t opcode,
unsigned int arg1,
628 uint8_t rd = avr_core_gpwr_get (core, Rd);
633 res = rd & ~(1 << bit);
635 res = rd | (1 << bit);
637 avr_core_gpwr_set (core, Rd, res);
645 avr_op_BRBC (AvrCore *core, uint16_t opcode,
unsigned int arg1,
680 avr_op_BRBS (AvrCore *core, uint16_t opcode,
unsigned int arg1,
715 avr_op_BREAK (AvrCore *core, uint16_t opcode,
unsigned int arg1,
736 avr_message (
"BREAK POINT: PC = 0x%08x: clock = %lld\n",
748 avr_op_BSET (AvrCore *core, uint16_t opcode,
unsigned int arg1,
768 avr_op_BST (AvrCore *core, uint16_t opcode,
unsigned int arg1,
783 uint8_t rd = avr_core_gpwr_get (core, Rd);
793 avr_op_CALL (AvrCore *core, uint16_t opcode,
unsigned int arg1,
805 int pc = avr_core_PC_get (core);
811 int k = (kh << 16) + kl;
813 if ((pc_bytes == 2) && (k > 0xffff))
814 avr_error (
"Address out of allowed range: 0x%06x", k);
818 avr_core_PC_set (core, k);
825 avr_op_CBI (AvrCore *core, uint16_t opcode,
unsigned int arg1,
850 avr_op_COM (AvrCore *core, uint16_t opcode,
unsigned int arg1,
866 uint8_t rd = avr_core_gpwr_get (core, Rd);
867 uint8_t res = 0xff - rd;
869 uint8_t sreg = avr_core_sreg_get (core);
877 avr_core_sreg_set (core, sreg);
879 avr_core_gpwr_set (core, Rd, res);
887 avr_op_CP (AvrCore *core, uint16_t opcode,
unsigned int arg1,
899 int Z, C, N, V, S, H;
904 uint8_t rd = avr_core_gpwr_get (core, Rd);
905 uint8_t rr = avr_core_gpwr_get (core, Rr);
906 uint8_t res = rd - rr;
908 uint8_t sreg = avr_core_sreg_get (core);
911 get_compare_carry (res, rd, rr, 3));
913 get_compare_overflow (res, rd, rr));
918 get_compare_carry (res, rd, rr, 7));
920 avr_core_sreg_set (core, sreg);
929 avr_op_CPC (AvrCore *core, uint16_t opcode,
unsigned int arg1,
941 int Z, C, N, V, S, H, prev_Z;
946 uint8_t rd = avr_core_gpwr_get (core, Rd);
947 uint8_t rr = avr_core_gpwr_get (core, Rr);
950 uint8_t sreg = avr_core_sreg_get (core);
953 get_compare_carry (res, rd, rr, 3));
955 get_compare_overflow (res, rd, rr));
959 get_compare_carry (res, rd, rr, 7));
962 Z = ((res & 0xff) == 0);
966 avr_core_sreg_set (core, sreg);
975 avr_op_CPI (AvrCore *core, uint16_t opcode,
unsigned int arg1,
987 int Z, C, N, V, S, H;
992 uint8_t rd = avr_core_gpwr_get (core, Rd);
993 uint8_t res = rd - K;
995 uint8_t sreg = avr_core_sreg_get (core);
998 get_compare_carry (res, rd, K, 3));
1000 get_compare_overflow (res, rd, K));
1005 get_compare_carry (res, rd, K, 7));
1007 avr_core_sreg_set (core, sreg);
1016 avr_op_CPSE (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1033 uint8_t rd = avr_core_gpwr_get (core, Rd);
1034 uint8_t rr = avr_core_gpwr_get (core, Rr);
1036 if (is_next_inst_2_words (core))
1056 avr_op_DEC (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1071 uint8_t rd = avr_core_gpwr_get (core, Rd);
1072 uint8_t res = rd - 1;
1074 uint8_t sreg = avr_core_sreg_get (core);
1081 avr_core_sreg_set (core, sreg);
1083 avr_core_gpwr_set (core, Rd, res);
1092 avr_op_EICALL (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1104 int pc = avr_core_PC_get (core);
1109 ((core->EIND & 0x3f) << 16) + (avr_core_gpwr_get (core, 31) << 8) +
1110 avr_core_gpwr_get (core, 30);
1116 avr_core_PC_set (core, new_pc);
1119 return opcode_EICALL;
1123 avr_op_EIJMP (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1138 ((core->EIND & 0x3f) << 16) + (avr_core_gpwr_get (core, 31) << 8) +
1139 avr_core_gpwr_get (core, 30);
1143 avr_core_PC_set (core, new_pc);
1146 return opcode_EIJMP;
1150 avr_op_ELPM_Z (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1162 int Z, high_byte, flash_addr;
1167 if ((Rd == 30) || (Rd == 31))
1168 avr_error (
"Results of operation are undefined");
1175 (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30);
1177 high_byte = Z & 0x1;
1184 avr_core_gpwr_set (core, Rd, data >> 8);
1186 avr_core_gpwr_set (core, Rd, data & 0xff);
1191 return opcode_ELPM_Z;
1195 avr_op_ELPM_Z_incr (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1207 int Z, high_byte, flash_addr;
1212 if ((Rd == 30) || (Rd == 31))
1213 avr_error (
"Results of operation are undefined");
1221 (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30);
1223 high_byte = Z & 0x1;
1230 avr_core_gpwr_set (core, Rd, data >> 8);
1232 avr_core_gpwr_set (core, Rd, data & 0xff);
1236 avr_core_gpwr_set (core, 30, Z & 0xff);
1237 avr_core_gpwr_set (core, 31, Z >> 8);
1243 return opcode_ELPM_Z_incr;
1247 avr_op_ELPM (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1261 avr_op_ELPM_Z (core, 0x9006, arg1, arg2);
1266 avr_op_EOR (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1283 uint8_t rd = avr_core_gpwr_get (core, Rd);
1284 uint8_t rr = avr_core_gpwr_get (core, Rr);
1286 uint8_t res = rd ^ rr;
1288 uint8_t sreg = avr_core_sreg_get (core);
1295 avr_core_sreg_set (core, sreg);
1297 avr_core_gpwr_set (core, Rd, res);
1306 avr_op_ESPM (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1318 avr_error (
"This opcode is not implemented yet: 0x%04x", opcode);
1328 avr_op_FMUL (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1343 uint8_t rd = avr_core_gpwr_get (core, Rd);
1344 uint8_t rr = avr_core_gpwr_get (core, Rr);
1346 uint16_t resp = rd * rr;
1347 uint16_t res = resp << 1;
1349 uint8_t sreg = avr_core_sreg_get (core);
1354 avr_core_sreg_set (core, sreg);
1357 avr_core_gpwr_set (core, 1, res >> 8);
1358 avr_core_gpwr_set (core, 0, res & 0xff);
1367 avr_op_FMULS (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1382 int8_t rd = avr_core_gpwr_get (core, Rd);
1383 int8_t rr = avr_core_gpwr_get (core, Rr);
1385 uint16_t resp = rd * rr;
1386 uint16_t res = resp << 1;
1388 uint8_t sreg = avr_core_sreg_get (core);
1393 avr_core_sreg_set (core, sreg);
1396 avr_core_gpwr_set (core, 1, res >> 8);
1397 avr_core_gpwr_set (core, 0, res & 0xff);
1402 return opcode_FMULS;
1406 avr_op_FMULSU (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1421 int8_t rd = avr_core_gpwr_get (core, Rd);
1422 uint8_t rr = avr_core_gpwr_get (core, Rr);
1424 uint16_t resp = rd * rr;
1425 uint16_t res = resp << 1;
1427 uint8_t sreg = avr_core_sreg_get (core);
1432 avr_core_sreg_set (core, sreg);
1435 avr_core_gpwr_set (core, 1, res >> 8);
1436 avr_core_gpwr_set (core, 0, res & 0xff);
1441 return opcode_FMULSU;
1445 avr_op_ICALL (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1457 int pc = avr_core_PC_get (core);
1462 (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30);
1466 avr_core_PC_set (core, new_pc);
1469 return opcode_ICALL;
1473 avr_op_IJMP (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1488 (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30);
1489 avr_core_PC_set (core, new_pc);
1496 avr_op_IN (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1520 avr_op_INC (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1535 uint8_t rd = avr_core_gpwr_get (core, Rd);
1536 uint8_t res = rd + 1;
1538 uint8_t sreg = avr_core_sreg_get (core);
1545 avr_core_sreg_set (core, sreg);
1547 avr_core_gpwr_set (core, Rd, res);
1556 avr_op_JMP (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1569 int kl =
flash_read (core->flash, avr_core_PC_get (core) + 1);
1571 int k = (kh << 16) + kl;
1573 avr_core_PC_set (core, k);
1580 avr_op_LDD_Y (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1597 Y = (avr_core_gpwr_get (core, 29) << 8) + avr_core_gpwr_get (core, 28);
1599 avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, Y + q));
1604 return opcode_LDD_Y;
1608 avr_op_LDD_Z (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1626 Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30);
1628 avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, Z + q));
1633 return opcode_LDD_Z;
1637 avr_op_LDI (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1652 avr_core_gpwr_set (core, Rd, K);
1661 avr_op_LDS (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1676 int k_pc = avr_core_PC_get (core) + 1;
1679 avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, k));
1688 avr_op_LD_X (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1705 X = (avr_core_gpwr_get (core, 27) << 8) + avr_core_gpwr_get (core, 26);
1707 avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, X));
1716 avr_op_LD_X_decr (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1732 if ((Rd == 26) || (Rd == 27))
1733 avr_error (
"Results of operation are undefined");
1736 X = (avr_core_gpwr_get (core, 27) << 8) + avr_core_gpwr_get (core, 26);
1740 avr_core_gpwr_set (core, 26, X & 0xff);
1741 avr_core_gpwr_set (core, 27, X >> 8);
1743 avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, X));
1748 return opcode_LD_X_decr;
1752 avr_op_LD_X_incr (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1768 if ((Rd == 26) || (Rd == 27))
1769 avr_error (
"Results of operation are undefined");
1772 X = (avr_core_gpwr_get (core, 27) << 8) + avr_core_gpwr_get (core, 26);
1774 avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, X));
1778 avr_core_gpwr_set (core, 26, X & 0xff);
1779 avr_core_gpwr_set (core, 27, X >> 8);
1784 return opcode_LD_X_incr;
1788 avr_op_LD_Y_decr (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1804 if ((Rd == 28) || (Rd == 29))
1805 avr_error (
"Results of operation are undefined");
1808 Y = (avr_core_gpwr_get (core, 29) << 8) + avr_core_gpwr_get (core, 28);
1812 avr_core_gpwr_set (core, 28, Y & 0xff);
1813 avr_core_gpwr_set (core, 29, Y >> 8);
1815 avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, Y));
1820 return opcode_LD_Y_decr;
1824 avr_op_LD_Y_incr (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1840 if ((Rd == 28) || (Rd == 29))
1841 avr_error (
"Results of operation are undefined");
1844 Y = (avr_core_gpwr_get (core, 29) << 8) + avr_core_gpwr_get (core, 28);
1846 avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, Y));
1850 avr_core_gpwr_set (core, 28, Y & 0xff);
1851 avr_core_gpwr_set (core, 29, Y >> 8);
1856 return opcode_LD_Y_incr;
1860 avr_op_LD_Z_incr (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1876 if ((Rd == 30) || (Rd == 31))
1877 avr_error (
"Results of operation are undefined");
1880 Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30);
1882 avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, Z));
1886 avr_core_gpwr_set (core, 30, Z & 0xff);
1887 avr_core_gpwr_set (core, 31, Z >> 8);
1892 return opcode_LD_Z_incr;
1896 avr_op_LD_Z_decr (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1912 if ((Rd == 30) || (Rd == 31))
1913 avr_error (
"Results of operation are undefined");
1916 Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30);
1920 avr_core_gpwr_set (core, 30, Z & 0xff);
1921 avr_core_gpwr_set (core, 31, Z >> 8);
1923 avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, Z));
1928 return opcode_LD_Z_decr;
1932 avr_op_LPM_Z (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1944 uint16_t Z, high_byte;
1950 Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30);
1951 high_byte = Z & 0x1;
1960 avr_core_gpwr_set (core, Rd, data >> 8);
1962 avr_core_gpwr_set (core, Rd, data & 0xff);
1967 return opcode_LPM_Z;
1971 avr_op_LPM (AvrCore *core, uint16_t opcode,
unsigned int arg1,
1984 return avr_op_LPM_Z (core, 0x9004, 0, arg2);
1988 avr_op_LPM_Z_incr (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2000 uint16_t Z, high_byte;
2005 if ((Rd == 30) || (Rd == 31))
2006 avr_error (
"Results of operation are undefined");
2009 Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30);
2010 high_byte = Z & 0x1;
2019 avr_core_gpwr_set (core, Rd, data >> 8);
2021 avr_core_gpwr_set (core, Rd, data & 0xff);
2025 avr_core_gpwr_set (core, 30, Z & 0xff);
2026 avr_core_gpwr_set (core, 31, Z >> 8);
2031 return opcode_LPM_Z_incr;
2035 avr_op_LSR (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2050 uint8_t rd = avr_core_gpwr_get (core, Rd);
2052 uint8_t res = (rd >> 1) & 0x7f;
2054 uint8_t sreg = avr_core_sreg_get (core);
2062 avr_core_sreg_set (core, sreg);
2064 avr_core_gpwr_set (core, Rd, res);
2073 avr_op_MOV (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2087 avr_core_gpwr_set (core, Rd, avr_core_gpwr_get (core, Rr));
2096 avr_op_MOVW (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2116 avr_core_gpwr_set (core, Rd, avr_core_gpwr_get (core, Rr));
2117 avr_core_gpwr_set (core, Rd + 1, avr_core_gpwr_get (core, Rr + 1));
2126 avr_op_MUL (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2141 uint8_t rd = avr_core_gpwr_get (core, Rd);
2142 uint8_t rr = avr_core_gpwr_get (core, Rr);
2144 uint16_t res = rd * rr;
2146 uint8_t sreg = avr_core_sreg_get (core);
2151 avr_core_sreg_set (core, sreg);
2155 avr_core_gpwr_set (core, 1, res >> 8);
2156 avr_core_gpwr_set (core, 0, res & 0xff);
2165 avr_op_MULS (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2180 int8_t rd = (int8_t) avr_core_gpwr_get (core, Rd);
2181 int8_t rr = (int8_t) avr_core_gpwr_get (core, Rr);
2182 int16_t res = rd * rr;
2184 uint8_t sreg = avr_core_sreg_get (core);
2189 avr_core_sreg_set (core, sreg);
2192 avr_core_gpwr_set (core, 1, res >> 8);
2193 avr_core_gpwr_set (core, 0, res & 0xff);
2202 avr_op_MULSU (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2219 int8_t rd = (int8_t) avr_core_gpwr_get (core, Rd);
2220 uint8_t rr = avr_core_gpwr_get (core, Rr);
2222 int16_t res = rd * rr;
2224 uint8_t sreg = avr_core_sreg_get (core);
2229 avr_core_sreg_set (core, sreg);
2232 avr_core_gpwr_set (core, 1, res >> 8);
2233 avr_core_gpwr_set (core, 0, res & 0xff);
2238 return opcode_MULSU;
2242 avr_op_NEG (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2254 int Z, C, N, V, S, H;
2258 uint8_t rd = avr_core_gpwr_get (core, Rd);
2259 uint8_t res = (0x0 - rd) & 0xff;
2261 uint8_t sreg = avr_core_sreg_get (core);
2264 (((res >> 3) | (rd >> 3)) & 0x1));
2271 avr_core_sreg_set (core, sreg);
2273 avr_core_gpwr_set (core, Rd, res);
2282 avr_op_NOP (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2300 avr_op_OR (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2317 uint8_t res = avr_core_gpwr_get (core, Rd) | avr_core_gpwr_get (core, Rr);
2319 uint8_t sreg = avr_core_sreg_get (core);
2326 avr_core_sreg_set (core, sreg);
2328 avr_core_gpwr_set (core, Rd, res);
2337 avr_op_ORI (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2354 uint8_t res = avr_core_gpwr_get (core, Rd) | K;
2356 uint8_t sreg = avr_core_sreg_get (core);
2363 avr_core_sreg_set (core, sreg);
2365 avr_core_gpwr_set (core, Rd, res);
2374 avr_op_OUT (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2401 avr_op_POP (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2424 avr_op_PUSH (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2447 avr_op_RCALL (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2461 int pc = avr_core_PC_get (core);
2469 return opcode_RCALL;
2473 avr_op_RET (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2488 avr_core_PC_set (core, pc);
2495 avr_op_RETI (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2510 avr_core_PC_set (core, pc);
2519 avr_op_RJMP (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2540 avr_op_ROR (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2555 uint8_t rd = avr_core_gpwr_get (core, Rd);
2560 uint8_t sreg = avr_core_sreg_get (core);
2568 avr_core_sreg_set (core, sreg);
2570 avr_core_gpwr_set (core, Rd, res);
2579 avr_op_SBC (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2591 int Z, C, N, V, S, H;
2596 uint8_t rd = avr_core_gpwr_get (core, Rd);
2597 uint8_t rr = avr_core_gpwr_get (core, Rr);
2601 uint8_t sreg = avr_core_sreg_get (core);
2604 (get_sub_carry (res, rd, rr, 3)));
2606 (get_sub_overflow (res, rd, rr)));
2610 (get_sub_carry (res, rd, rr, 7)));
2612 if ((res & 0xff) != 0)
2615 avr_core_sreg_set (core, sreg);
2617 avr_core_gpwr_set (core, Rd, res);
2626 avr_op_SBCI (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2638 int Z, C, N, V, S, H;
2643 uint8_t rd = avr_core_gpwr_get (core, Rd);
2647 uint8_t sreg = avr_core_sreg_get (core);
2650 (get_sub_carry (res, rd, K, 3)));
2652 (get_sub_overflow (res, rd, K)));
2656 (get_sub_carry (res, rd, K, 7)));
2658 if ((res & 0xff) != 0)
2661 avr_core_sreg_set (core, sreg);
2663 avr_core_gpwr_set (core, Rd, res);
2672 avr_op_SBI (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2697 avr_op_SBIC (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2714 if (is_next_inst_2_words (core))
2734 avr_op_SBIS (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2751 if (is_next_inst_2_words (core))
2771 avr_op_SBIW (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2788 uint8_t rdl = avr_core_gpwr_get (core, Rd);
2789 uint8_t rdh = avr_core_gpwr_get (core, Rd + 1);
2791 uint16_t rd = (rdh << 8) + rdl;
2793 uint16_t res = rd - K;
2795 uint8_t sreg = avr_core_sreg_get (core);
2798 ((rdh >> 7 & 0x1) & ~(res >> 15 & 0x1)));
2803 ((res >> 15 & 0x1) & ~(rdh >> 7 & 0x1)));
2805 avr_core_sreg_set (core, sreg);
2807 avr_core_gpwr_set (core, Rd, res & 0xff);
2808 avr_core_gpwr_set (core, Rd + 1, res >> 8);
2817 avr_op_SBRC (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2834 if (is_next_inst_2_words (core))
2839 if (((avr_core_gpwr_get (core, Rd) >> b) & 0x1) == 0)
2854 avr_op_SBRS (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2871 if (is_next_inst_2_words (core))
2876 if (((avr_core_gpwr_get (core, Rd) >> b) & 0x1) != 0)
2891 avr_op_SLEEP (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2908 avr_error (
"MCUCR register not installed");
2911 if (mcucr_get_bit (mcucr, bit_SE))
2913 if (mcucr_get_bit (mcucr, bit_SM) == 0)
2928 return opcode_SLEEP;
2932 avr_op_SPM (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2944 avr_error (
"This opcode is not implemented yet: 0x%04x", opcode);
2949 avr_op_STD_Y (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2967 Y = (avr_core_gpwr_get (core, 29) << 8) + avr_core_gpwr_get (core, 28);
2969 avr_core_mem_write (core, Y + q, avr_core_gpwr_get (core, Rd));
2974 return opcode_STD_Y;
2978 avr_op_STD_Z (AvrCore *core, uint16_t opcode,
unsigned int arg1,
2996 Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30);
2998 avr_core_mem_write (core, Z + q, avr_core_gpwr_get (core, Rd));
3003 return opcode_STD_Z;
3007 avr_op_STS (AvrCore *core, uint16_t opcode,
unsigned int arg1,
3022 int k_pc = avr_core_PC_get (core) + 1;
3025 avr_core_mem_write (core, k, avr_core_gpwr_get (core, Rd));
3034 avr_op_ST_X (AvrCore *core, uint16_t opcode,
unsigned int arg1,
3051 X = (avr_core_gpwr_get (core, 27) << 8) + avr_core_gpwr_get (core, 26);
3053 avr_core_mem_write (core, X, avr_core_gpwr_get (core, Rd));
3062 avr_op_ST_X_decr (AvrCore *core, uint16_t opcode,
unsigned int arg1,
3078 if ((Rd == 26) || (Rd == 27))
3079 avr_error (
"Results of operation are undefined: 0x%04x", opcode);
3082 X = (avr_core_gpwr_get (core, 27) << 8) + avr_core_gpwr_get (core, 26);
3086 avr_core_gpwr_set (core, 26, X & 0xff);
3087 avr_core_gpwr_set (core, 27, X >> 8);
3089 avr_core_mem_write (core, X, avr_core_gpwr_get (core, Rd));
3094 return opcode_ST_X_decr;
3098 avr_op_ST_X_incr (AvrCore *core, uint16_t opcode,
unsigned int arg1,
3114 if ((Rd == 26) || (Rd == 27))
3115 avr_error (
"Results of operation are undefined: 0x%04x", opcode);
3118 X = (avr_core_gpwr_get (core, 27) << 8) + avr_core_gpwr_get (core, 26);
3120 avr_core_mem_write (core, X, avr_core_gpwr_get (core, Rd));
3124 avr_core_gpwr_set (core, 26, X & 0xff);
3125 avr_core_gpwr_set (core, 27, X >> 8);
3130 return opcode_ST_X_incr;
3134 avr_op_ST_Y_decr (AvrCore *core, uint16_t opcode,
unsigned int arg1,
3150 if ((Rd == 28) || (Rd == 29))
3151 avr_error (
"Results of operation are undefined: 0x%04x", opcode);
3154 Y = (avr_core_gpwr_get (core, 29) << 8) + avr_core_gpwr_get (core, 28);
3158 avr_core_gpwr_set (core, 28, Y & 0xff);
3159 avr_core_gpwr_set (core, 29, Y >> 8);
3161 avr_core_mem_write (core, Y, avr_core_gpwr_get (core, Rd));
3166 return opcode_ST_Y_decr;
3170 avr_op_ST_Y_incr (AvrCore *core, uint16_t opcode,
unsigned int arg1,
3186 if ((Rd == 28) || (Rd == 29))
3187 avr_error (
"Results of operation are undefined: 0x%04x", opcode);
3190 Y = (avr_core_gpwr_get (core, 29) << 8) + avr_core_gpwr_get (core, 28);
3192 avr_core_mem_write (core, Y, avr_core_gpwr_get (core, Rd));
3196 avr_core_gpwr_set (core, 28, Y & 0xff);
3197 avr_core_gpwr_set (core, 29, Y >> 8);
3202 return opcode_ST_Y_incr;
3206 avr_op_ST_Z_decr (AvrCore *core, uint16_t opcode,
unsigned int arg1,
3222 if ((Rd == 30) || (Rd == 31))
3223 avr_error (
"Results of operation are undefined: 0x%04x", opcode);
3226 Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30);
3230 avr_core_gpwr_set (core, 30, Z & 0xff);
3231 avr_core_gpwr_set (core, 31, Z >> 8);
3233 avr_core_mem_write (core, Z, avr_core_gpwr_get (core, Rd));
3238 return opcode_ST_Z_decr;
3242 avr_op_ST_Z_incr (AvrCore *core, uint16_t opcode,
unsigned int arg1,
3258 if ((Rd == 30) || (Rd == 31))
3259 avr_error (
"Results of operation are undefined: 0x%04x", opcode);
3262 Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30);
3264 avr_core_mem_write (core, Z, avr_core_gpwr_get (core, Rd));
3268 avr_core_gpwr_set (core, 30, Z & 0xff);
3269 avr_core_gpwr_set (core, 31, Z >> 8);
3274 return opcode_ST_Z_incr;
3278 avr_op_SUB (AvrCore *core, uint16_t opcode,
unsigned int arg1,
3290 int Z, C, N, V, S, H;
3295 uint8_t rd = avr_core_gpwr_get (core, Rd);
3296 uint8_t rr = avr_core_gpwr_get (core, Rr);
3298 uint8_t res = rd - rr;
3300 uint8_t sreg = avr_core_sreg_get (core);
3303 (get_sub_carry (res, rd, rr, 3)));
3305 (get_sub_overflow (res, rd, rr)));
3310 (get_sub_carry (res, rd, rr, 7)));
3312 avr_core_sreg_set (core, sreg);
3314 avr_core_gpwr_set (core, Rd, res);
3323 avr_op_SUBI (AvrCore *core, uint16_t opcode,
unsigned int arg1,
3335 int Z, C, N, V, S, H;
3340 uint8_t rd = avr_core_gpwr_get (core, Rd);
3342 uint8_t res = rd - K;
3344 uint8_t sreg = avr_core_sreg_get (core);
3347 (get_sub_carry (res, rd, K, 3)));
3349 (get_sub_overflow (res, rd, K)));
3354 (get_sub_carry (res, rd, K, 7)));
3356 avr_core_sreg_set (core, sreg);
3358 avr_core_gpwr_set (core, Rd, res);
3367 avr_op_SWAP (AvrCore *core, uint16_t opcode,
unsigned int arg1,
3380 uint8_t rd = avr_core_gpwr_get (core, Rd);
3382 avr_core_gpwr_set (core, Rd, ((rd << 4) & 0xf0) | ((rd >> 4) & 0x0f));
3391 avr_op_WDR (AvrCore *core, uint16_t opcode,
unsigned int arg1,
3408 avr_error (
"Core device doesn't have WDTCR attached");
3410 wdtcr_update (wdtcr);
3419 avr_op_UNKNOWN (AvrCore *core, uint16_t opcode,
unsigned int arg1,
3426 avr_op_NOP (core, opcode, arg1, arg2);
3427 return opcode_UNKNOWN;
3441 lookup_opcode (uint16_t opcode,
struct opcode_info *opi)
3451 opi->func = avr_op_BREAK;
3454 opi->func = avr_op_EICALL;
3457 opi->func = avr_op_EIJMP;
3460 opi->func = avr_op_ELPM;
3463 opi->func = avr_op_ESPM;
3466 opi->func = avr_op_ICALL;
3469 opi->func = avr_op_IJMP;
3472 opi->func = avr_op_LPM;
3475 opi->func = avr_op_NOP;
3478 opi->func = avr_op_RET;
3481 opi->func = avr_op_RETI;
3484 opi->func = avr_op_SLEEP;
3487 opi->func = avr_op_SPM;
3490 opi->func = avr_op_WDR;
3496 decode = opcode & ~(mask_Rd_5 |
mask_Rr_5);
3497 opi->arg1 = get_rd_5 (opcode);
3498 opi->arg2 = get_rr_5 (opcode);
3502 opi->func = avr_op_ADC;
3505 opi->func = avr_op_ADD;
3508 opi->func = avr_op_AND;
3511 opi->func = avr_op_CP;
3514 opi->func = avr_op_CPC;
3517 opi->func = avr_op_CPSE;
3520 opi->func = avr_op_EOR;
3523 opi->func = avr_op_MOV;
3526 opi->func = avr_op_MUL;
3529 opi->func = avr_op_OR;
3532 opi->func = avr_op_SBC;
3535 opi->func = avr_op_SUB;
3541 opi->arg1 = get_rd_5 (opcode);
3546 opi->func = avr_op_ASR;
3549 opi->func = avr_op_COM;
3552 opi->func = avr_op_DEC;
3555 opi->func = avr_op_ELPM_Z;
3558 opi->func = avr_op_ELPM_Z_incr;
3561 opi->func = avr_op_INC;
3564 opi->func = avr_op_LDS;
3567 opi->func = avr_op_LD_X;
3570 opi->func = avr_op_LD_X_decr;
3573 opi->func = avr_op_LD_X_incr;
3576 opi->func = avr_op_LD_Y_decr;
3579 opi->func = avr_op_LD_Y_incr;
3582 opi->func = avr_op_LD_Z_decr;
3585 opi->func = avr_op_LD_Z_incr;
3588 opi->func = avr_op_LPM_Z;
3591 opi->func = avr_op_LPM_Z_incr;
3594 opi->func = avr_op_LSR;
3597 opi->func = avr_op_NEG;
3600 opi->func = avr_op_POP;
3603 opi->func = avr_op_PUSH;
3606 opi->func = avr_op_ROR;
3609 opi->func = avr_op_STS;
3612 opi->func = avr_op_ST_X;
3615 opi->func = avr_op_ST_X_decr;
3618 opi->func = avr_op_ST_X_incr;
3621 opi->func = avr_op_ST_Y_decr;
3624 opi->func = avr_op_ST_Y_incr;
3627 opi->func = avr_op_ST_Z_decr;
3630 opi->func = avr_op_ST_Z_incr;
3633 opi->func = avr_op_SWAP;
3639 decode = opcode & ~(mask_Rd_4 |
mask_K_8);
3640 opi->arg1 = get_rd_4 (opcode);
3641 opi->arg2 = get_K_8 (opcode);
3645 opi->func = avr_op_ANDI;
3648 opi->func = avr_op_CPI;
3651 opi->func = avr_op_LDI;
3654 opi->func = avr_op_ORI;
3657 opi->func = avr_op_SBCI;
3660 opi->func = avr_op_SUBI;
3667 opi->arg1 = get_rd_5 (opcode);
3668 opi->arg2 = get_reg_bit (opcode);
3672 opi->func = avr_op_BLD;
3675 opi->func = avr_op_BST;
3678 opi->func = avr_op_SBRC;
3681 opi->func = avr_op_SBRS;
3688 opi->arg1 = get_reg_bit (opcode);
3689 opi->arg2 = n_bit_unsigned_to_signed (get_k_7 (opcode), 7);
3693 opi->func = avr_op_BRBC;
3696 opi->func = avr_op_BRBS;
3703 opi->arg1 = get_rd_5 (opcode);
3704 opi->arg2 = get_q (opcode);
3708 opi->func = avr_op_LDD_Y;
3711 opi->func = avr_op_LDD_Z;
3714 opi->func = avr_op_STD_Y;
3717 opi->func = avr_op_STD_Z;
3723 opi->arg1 = get_k_22 (opcode);
3728 opi->func = avr_op_CALL;
3731 opi->func = avr_op_JMP;
3737 opi->arg1 = get_sreg_bit (opcode);
3744 opi->func = avr_op_BCLR;
3747 opi->func = avr_op_BSET;
3753 decode = opcode & ~(mask_K_6 |
mask_Rd_2);
3754 opi->arg1 = get_rd_2 (opcode);
3755 opi->arg2 = get_K_6 (opcode);
3759 opi->func = avr_op_ADIW;
3762 opi->func = avr_op_SBIW;
3769 opi->arg1 = get_A_5 (opcode);
3770 opi->arg2 = get_reg_bit (opcode);
3774 opi->func = avr_op_CBI;
3777 opi->func = avr_op_SBI;
3780 opi->func = avr_op_SBIC;
3783 opi->func = avr_op_SBIS;
3789 decode = opcode & ~(mask_A_6 |
mask_Rd_5);
3790 opi->arg1 = get_rd_5 (opcode);
3791 opi->arg2 = get_A_6 (opcode);
3795 opi->func = avr_op_IN;
3798 opi->func = avr_op_OUT;
3804 opi->arg1 = n_bit_unsigned_to_signed (get_k_12 (opcode), 12);
3809 opi->func = avr_op_RCALL;
3812 opi->func = avr_op_RJMP;
3817 decode = opcode & ~(mask_Rd_4 |
mask_Rr_4);
3818 opi->arg1 = get_rd_4 (opcode);
3819 opi->arg2 = get_rr_4 (opcode);
3823 opi->func = avr_op_MOVW;
3826 opi->func = avr_op_MULS;
3831 decode = opcode & ~(mask_Rd_3 |
mask_Rr_3);
3832 opi->arg1 = get_rd_3 (opcode);
3833 opi->arg2 = get_rr_3 (opcode);
3837 opi->func = avr_op_MULSU;
3840 opi->func = avr_op_FMUL;
3843 opi->func = avr_op_FMULS;
3846 opi->func = avr_op_FMULSU;
3853 opi->func = avr_op_UNKNOWN;
3871 if (global_opcode_lookup_table == NULL)
3873 int num_ops = 0x10000;
3876 global_opcode_lookup_table =
avr_new0 (
struct opcode_info, num_ops);
3877 for (i = 0; i < num_ops; i++)
3879 lookup_opcode (i, global_opcode_lookup_table + i);
3892 extern inline struct opcode_info *
decode_opcode (uint16_t opcode);
void avr_core_rampz_set(AvrCore *core, uint8_t v)
Set the value of the rampz register.
void avr_core_set_sleep_mode(AvrCore *core, int sleep_mode)
Sets the device to a sleep state.
#define avr_new0(type, count)
Macro for allocating memory and initializing it to zero.
int32_t avr_core_PC_size(AvrCore *core)
Returns the size of the Program Counter in bytes.
decoder_operand_masks
Masks to help extracting information from opcodes.
uint8_t avr_core_io_read(AvrCore *core, int reg)
Reads the value of a register.
uint16_t flash_read(Flash *flash, int addr)
Reads a 16-bit word from flash.
uint64_t avr_core_CK_get(AvrCore *core)
Get the current clock counter.
int avr_core_sreg_get_bit(AvrCore *core, int b)
Get the value of bit b of the status register.
uint8_t set_bit_in_byte(uint8_t src, int bit, int val)
Set a bit in src to 1 if val != 0, clears bit if val == 0.
void decode_init_lookup_table(void)
Initialize the decoder lookup table.
#define avr_warning(fmt, args...)
Print a warning message to stderr.
uint32_t avr_core_stack_pop(AvrCore *core, int bytes)
Pop 1-4 bytes off of the stack.
void avr_core_io_write(AvrCore *core, int reg, uint8_t val)
Writes the value of a register. See avr_core_io_read() for a discussion of reg.
uint8_t avr_core_rampz_get(AvrCore *core)
Get the value of the rampz register.
struct opcode_info * decode_opcode(uint16_t opcode)
Decode an opcode into the opcode handler function.
#define avr_error(fmt, args...)
Print an error message to stderr and terminate program.
void avr_core_PC_incr(AvrCore *core, int val)
Increment the Program Counter by val.
void avr_core_sreg_set_bit(AvrCore *core, int b, int v)
Set the value of bit b of the status register.
VDevice * avr_core_get_vdev_by_name(AvrCore *core, char *name)
Returns the VDevice with the name name.
void avr_core_stack_push(AvrCore *core, int bytes, uint32_t val)
Push 1-4 bytes onto the stack.
void avr_core_inst_CKS_set(AvrCore *core, int val)
Set the number of clock cycles for the instruction being executed.
#define avr_message(fmt, args...)
Print an ordinary message to stdout.